kenjiwn
(kenjiwn)
Usage start date: 08/18/2017
FPGA Engineer; RTL Design/Verification; Video Codec Expert; IEICE RECONF専門委員; Vivado/Vivado HLS/SDSoC/Quartus/Modelsim/Verilog HDL/H.264/H.265
Your Groups
- Attended 4
- Organize 0
- Presenter 0
- Bookmark 0
No presentation events found.